GNU Arm Embedded Toolchain

GNU Arm Embedded Toolchain 5-2016-q2-update

Update 5 in Q2 2016

Milestone information

Project:
GNU Arm Embedded Toolchain
Series:
5.0
Version:
5-2016-q2-update
Released:
 
Registrant:
Pietro Palazzo
Release registered:
Active:
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Assignees:
1 Thomas Preud'homme
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Bugs:
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Total downloads: 964,942

Release notes 

The 5 2016q2 update release is available at:
------------------------------------------------------------------

* https://launchpad.net/gcc-arm-embedded/5.0/5-2016-q2-update
* https://launchpad.net/~team-gcc-arm-embedded/+archive/ubuntu/ppa

Important bugs fixed in 5 update 2 release:
-----------------------------------------------------------------

* Fixed code-size regression for Cortex-M0 compared to 4.9 when compiling with -Os
* Fix multilib used for armv8-m.main+dsp
* Fix use of --gc-sections when building for ARMv8-M with Security Extensions
* Fix memcpy used for newlib-nano for pre ARMv6T2 devices
* Fix alignment of .data in ldscripts in samples
* Fix semihosting for ARMv7-A and ARMv7-R

Note
--------

* Further releases will be available at https://developer.arm.com/open-source/gnu-toolchain/gnu-rm .

Changelog 

View the full changelog

New Features
---------------------

* Re-tied the MALLOC_LOCK and MALLOC_UNLOCK to newlib's multithread configuration for newlib-nano.

Important bugs fixed in 5 update 2 release
-----------------------------------------------------------------

* Fixed code-size regression for Cortex-M0 compared to 4.9 when compiling with -Os
* Fix multilib used for armv8-m.main+dsp
* Fix use of --gc-sections when building for ARMv8-M with Security Extensions
* Fix memcpy used for newlib-nano for pre ARMv6T2 devices
* Fix alignment of .data in ldscripts in samples
* Fix semihosting for ARMv7-A and ARMv7-R

Known Changes and Issues
-----------------------------------------

* Thumb1 code size regression due to new register allocation:
  https://gcc.gnu.org/bugzilla/show_bug.cgi?id=61578
  https://gcc.gnu.org/bugzilla/show_bug.cgi?id=59535
  *A workaround is to disable it by option -mno-lra*.
* The use of 64-bit atomic operations for ARMv8-M Mainline is not supported.

0 blueprints and 1 bug targeted

Bug report Importance Assignee Status
1566385 #1566385 gcc.ld does not align .data correctly 3 High Thomas Preud'homme  10 Fix Released
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